Configuration of SPI Flash in platforms based on multiple Intel platforms allow a local attacker to alter the behavior of the SPI flash pot…

published 2018-04-03 8 y ago modified 2026-06-17 4 mo ago also EUVD-2017-14780

cvss: 6.0; version 3.0, NVD
cisa kev: Not listed; not in CISA's catalog
epss: 0.3%; EPSS 0.3% chance of exploitation in 30 days, percentile 27%
public exploits: 0; none known

Configuration of SPI Flash in platforms based on multiple Intel platforms allow a local attacker to alter the behavior of the SPI flash potentially leading to a Denial of Service.

Exploit prediction

0.34% chance of exploitation in the next 30 days, higher than 27% of all scored CVEs (FIRST EPSS, 2026-11-09).

CVSS scores

assigned by	version	score	vector
NVD	3.0	6.0	CVSS:3.0/AV:L/AC:L/PR:H/UI:N/S:C/C:N/I:N/A:H
NVD	2.0	3.6	AV:L/AC:L/Au:N/C:N/I:P/A:P

Affected products

Intel Corporation Intel 6th generation Intel Core Processors, Intel 7th generation Processors, Intel Xeon Scalable Processors, Intel Xeon Processor E3 v5 Family, Intel Xeon Processor E3 v6 Family, and Intel Atom Processor C Series.

Classification

Weakness

CWE-269 Improper Privilege Management

References

security-center.intel.com /advisory.aspx?intelid=INTEL-SA-00087&languageid=en-fr
vendor-advisory
support.hpe.com /hpsc/doc/public/display?docLocale=en_US&docId=emr_na-hpesbhf03867en_us
securitytracker.com /id/1040626
vdb-entry, third-party-advisory
security.netapp.com /advisory/ntap-20180924-0004/

Sources

CVE List CVE-2017-5703
NVD CVE-2017-5703

Fencer Intel keeps one entry per vulnerability: the CVE id wins, then GHSA, and records that alias each other are merged, except that two CVEs always keep separate entries. The same data is available as JSON.

Summary