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Fencer Intel
low 3.8

CVE-2024-37020 json

Sequence of processor instructions leads to unexpected behavior in the Intel(R) DSA V1.0 for some Intel(R) Xeon(R) Processors may allow an…

published last yr. modified 4mo ago also EUVD-2025-4961

cvss
3.8
version 3.1, CNA
cisa kev
Not listed
not in CISA's catalog
epss
0.2%
EPSS 0.2% chance of exploitation in 30 days, percentile 14%
public exploits
0
none known

Summary

Sequence of processor instructions leads to unexpected behavior in the Intel(R) DSA V1.0 for some Intel(R) Xeon(R) Processors may allow an authenticated user to potentially enable denial of service via local access.

Patch / fix

  • intel-microcode Debian 12 3.20250211.1~deb12u1
  • intel-microcode Debian 14, Debian 13 3.20250211.1

debian advisories DEBIAN-CVE-2024-37020

  • ucode-intel Linux Micro 6.1 20250211-slfo.1.1_2.1
  • ucode-intel Linux Micro 6.0 20250211-1.1
  • ucode-intel SLES for SAP 15 SP5, SLES for SAP 15 SP4, SLES for SAP 15 SP3 +18 more 20250211-150200.53.1
  • microcode_ctl SLES 11 SP4 LTSS EXTREME CORE 1.17-102.83.81.1
  • ucode-intel SLES LTSS Extended Security 12 SP5, SLES 12 SP5-LTSS 20250211-149.2

suse advisories SUSE-SU-2025:20286-1SUSE-SU-2025:1032-1SUSE-SU-2025:20158-1SUSE-SU-2025:0591-1SUSE-SU-2025:0569-1

  • ucode-intel openSUSE Tumbleweed 20250211-1.1

opensuse advisories openSUSE-SU-2025:14803-1

  • intel-ucode Alpine 3.24, Alpine 3.23, Alpine 3.22 +4 more 20250211-r0

alpine advisories ALPINE-CVE-2024-37020

Alpine secdb © Alpine Linux, from https://secdb.alpinelinux.org via OSV; changed: normalised to fixed package versions per release. CC BY-SA 4.0

Is CVE-2024-37020 in your stack? Fencer shows which of your repositories are affected as soon as an advisory lands, and opens the fix as a pull request.

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CISA SSVC

Exploitation
none
Automatable
no
Technical impact
partial
Assessed
last yr.

Exploit prediction

0.24% chance of exploitation in the next 30 days, higher than 14% of all scored CVEs (FIRST EPSS, 2026-11-11).

CVSS scores

assigned by version score vector
CNA 4.0 4.9 CVSS:4.0/AV:L/AC:L/AT:N/PR:L/UI:N/VC:N/VI:N/VA:L/SC:N/SI:N/SA:N
CNA 3.1 3.8 CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:N/I:N/A:L
CNA 4.0 4.8 CVSS:4.0/AV:L/AC:L/AT:N/PR:L/UI:N/VC:N/VI:N/VA:L/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X

Affected products

  • n/a Intel(R) Xeon(R) Processors

Classification

Weakness
  • CWE-1281 Sequence of Processor Instructions Leads to Unexpected Behavior

References

Sources

Fencer Intel keeps one entry per vulnerability: the CVE id wins, then GHSA, and records that alias each other are merged, except that two CVEs always keep separate entries. The same data is available as JSON.