A vulnerability exists in riscv-boom SonicBOOM 1.2 (BOOMv1.2) processor implementation, where valid virtual-to-physical address translation…

published 2025-08-19 last yr. modified 2026-06-17 4mo ago also EUVD-2025-25183

cvss: 4.3; version 3.1, CNA
cisa kev: Not listed; not in CISA's catalog
epss: 0.3%; EPSS 0.3% chance of exploitation in 30 days, percentile 23%
public exploits: 0; none known

A vulnerability exists in riscv-boom SonicBOOM 1.2 (BOOMv1.2) processor implementation, where valid virtual-to-physical address translations configured with write permissions (PTE_W) in SV39 mode may incorrectly trigger a Store/AMO access fault during store instructions (sd). This occurs despite the presence of proper page table entries and valid memory access modes. The fault is reproducible when transitioning into virtual memory and attempting store operations in mapped kernel memory, indicating a potential flaw in the MMU, PMP, or memory access enforcement logic. This may cause unexpected kernel panics or denial of service in systems using BOOMv1.2.

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CISA SSVC

Exploitation: Proof of concept is public
Automatable: no
Technical impact: partial
Assessed: last yr. (2025-08-19)

Exploit prediction

0.30% chance of exploitation in the next 30 days, higher than 23% of all scored CVEs (FIRST EPSS, 2026-11-09).

Exploits and checks

github.com https://github.com/LuLuji04/POC-Boomv1.2 referenced PoC, tagged "exploit" by a source, unverified

CVSS scores

assigned by	version	score	vector
CISA ADP	3.1	4.3	CVSS:3.1/AV:P/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N
CNA	3.1	4.3	CVSS:3.1/AV:P/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N

Classification

Weakness

CWE-284 Improper Access Control
CWE-693 Protection Mechanism Failure
CWE-434 Unrestricted Upload of File with Dangerous Type

References

github.com /LuLuji04/POC-Boomv1.2
exploit, third-party-advisory
github.com /riscv-boom/riscv-boom
product
github.com /riscv-software-src/riscv-isa-sim
product

Sources

CVE List CVE-2025-50897
NVD CVE-2025-50897

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